|
Size: 1558
Comment:
|
Size: 1916
Comment: Typos
|
| Deletions are marked like this. | Additions are marked like this. |
| Line 4: | Line 4: |
| ||||''Thursday 20 October''|||| || 09.30|| Timothy Roscoe (ETH Zurich) || Welcome, last year's progress, workshop goals|| || 10.00|| Werner Haas (Intel) ||System-level implications of non-volatile, random-access memory || || 10.15|| Matt Horsnell (ARM) ||OS support in ARMv7A|| |
||||<(>''Thursday 20 October''|||| || 09.30|| Timothy Roscoe (ETH Zurich) || [[attachment:2011-roscoe.pdf|Welcome, last year's progress, workshop goals]]|| || 10.00|| Werner Haas (Intel) ||[[attachment:2011-haas.pdf|System-level implications of non-volatile, random-access memory]] || || 10.15|| Matt Horsnell (ARM) ||[[attachment:2011-horsnell.pdf|OS support in ARMv7A]]|| |
| Line 9: | Line 9: |
| || 11.30|| Pravin Shinde (ETH Zurich) ||Scalable and adaptive network stack architecture|| || 12.00|| Jana Giceva (ETH Zurich) ||Database-OS co-design|| || 12.30|| Zach Anderson (ETH Zurich) ||Fine-grained, language-level, hierarchical resource management|| |
|| 11.30|| Pravin Shinde (ETH Zurich) ||[[attachment:2011-shinde.pdf|Scalable and adaptive network stack architecture]]|| || 12.00|| Zach Anderson (ETH Zurich) || [[attachment:2011-anderson.pdf|Fine-grained, language-level, hierarchical resource management]]|| || 12.30|| Stefan Kästle (ETH Zurich) || [[attachment:2011-kaestle.pdf|Message-passing co-processor]] || |
| Line 13: | Line 13: |
| || 14.30|| Ross McIlroy (Microsoft) ||Calico: rethinking the language / runtime-system boundary || || 15.00|| Marcin Orczyk & Calum McCall ||GHC for a multi-kernel architecture (U. Glasgow)|| || 16.00|| Georgios Varisteas (KTH) ||Dynamic inter-core scheduling in Barrelfish|| |
|| 14.30|| Ross !McIlroy (Microsoft) ||[[attachment:2011-mcilroy.pdf|Calico: rethinking the language / runtime-system boundary]] || || 15.00|| Marcin Orczyk & Calum !McCall(U. Glasgow) ||[[attachment:2011-mccall.pdf|GHC for a multi-kernel architecture]]|| || 16.00|| Georgios Varisteas (KTH) ||[[attachment:2011-varisteas.pdf|Dynamic inter-core scheduling in Barrelfish]]|| |
| Line 19: | Line 19: |
| ||||''Friday 21 October''|||| | ||||<(>''Friday 21 October''|||| |
| Line 21: | Line 21: |
| || 10.00|| Stefan Kästle (ETH Zurich) ||Message-passing co-processor|| || 10.30|| Tim Harris (Microsoft) ||Flexible hardware support for message passing|| |
|| 10.00|| Jana Giceva (ETH Zurich) ||[[attachment:2011-giceva.pdf|Database-OS co-design]]|| || 10.30|| Tim Harris (Microsoft) ||[[attachment:2011-harris.pdf|Flexible hardware support for message passing]]|| |
2011 Barrelfish workshop
20-21 October, Cambridge University Computer Laboratory
Thursday 20 October |
||
09.30 |
Timothy Roscoe (ETH Zurich) |
|
10.00 |
Werner Haas (Intel) |
System-level implications of non-volatile, random-access memory |
10.15 |
Matt Horsnell (ARM) |
|
10.30 |
Andrew Baumann (Microsoft) |
Drawbridge on Barrelfish |
11.30 |
Pravin Shinde (ETH Zurich) |
|
12.00 |
Zach Anderson (ETH Zurich) |
Fine-grained, language-level, hierarchical resource management |
12.30 |
Stefan Kästle (ETH Zurich) |
|
14.00 |
Adrian Schüpbach (ETH Zurich) |
A declarative language approach to device configuration |
14.30 |
Ross McIlroy (Microsoft) |
|
15.00 |
Marcin Orczyk & Calum McCall(U. Glasgow) |
|
16.00 |
Georgios Varisteas (KTH) |
|
16.30 |
Robert Watson (CUCL) |
BERI: an open source platform for research into the h/w-s/w interface |
16.45 |
Mikel Lujan (U. Manchester) |
Teraflux: A Manchester Perspective |
|
||
Friday 21 October |
||
09.30 |
Zeus Gómez Marmolejo (BSC) |
GCC cross compiler and Gasnet |
10.00 |
Jana Giceva (ETH Zurich) |
|
10.30 |
Tim Harris (Microsoft) |
|