There is rudimentary support for booting Barrelfish on the gem5 simulator.
This provides a platform for experimenting with OS/architecture co-design, and for experimenting with architectural support for aspects of Barrelfish (e.g., message passing).
The only configuration that has been exercised is full-system x86 using the simple CPU model. Other x86 configurations may work (e.g., in-order CPU, out-of-order CPU, depending on the underlying implementation of these CPU models in gem5). ARM configurations have not yet been tried.